From the beginning of semiconductor device technology physicists have postulated a host of heterostructures, i.e., combinations of layers of different materials in a single composite crystal. The interest in this kind of structure is traceable to the wide variety of characteristics that can potentially be achieved in devices incorporating such structures.
In the last few years, considerable progress has been made in this field, and techniques are now known that permit production of various combinations of materials. For instance, U.s. Pat. No. 4,554,045 (incorporated herein by reference) teaches a method for producing metal silicide/silicon heterostructures, such that the silicide is essentially monocrystalline and epitaxial with the underlying silicon substrate.
The known techniques are not restricted to techniques for forming heterostructures comprising a metal silicide layer. For instance, Ishiwara et al, Applied Physics Letters, Vol. 40, pages 66-68 (1982), disclose a technique for growing an epitaxial dielectric layer, namely CaF.sub.2, on silicon.
All of the prior art techniques for growing a heteroepitaxial structure have in common that they involve deposition of material onto the surface of the single crystal substrate. Obviously, once the epitaxial single crystal overlayer is formed it can become the substrate for formation of a further heteroepitaxial layer. Thus, the prior art knows Si/CoSi.sub.2 /Si and Si/CaF.sub.2 /Si heterostructures formed by particular embodiments of the deposition technique.
The prior art also knows several techniques for forming a particular heterostructure, namely, Si/SiO.sub.2 /Si (also referred to as SOI). Structurally, SOI differs fundamentally from the above referred to heterostructures since the SiO.sub.2 layer is not a single crystal layer, and, in fact, typically is amorphous. Thus SOI structures are not heteroepitaxial structures in the way the term is used herein, although, through seeding techniques, the orientation of the silicon overlayer can be caused to be the same as that of the silicon wafer upon which the combination was formed.
One particular technique for forming a SOI heterostructure involves implantation of oxygen ions into a silicon substrate. See U.S. Pat. No. 3,855,009. After appropriate preparation of a major surface of a silicon wafer, oxygen ions are implanted into the wafer through the major surface. As is well known, such ions come to rest in a relatively narrow subsurface region of the matrix, with the mean depth of penetration (and thickness of the oxygen-rich layer) depending on the energy of the ions. The '009 patent teaches that, after heat treating of the implanted wafer at a temperature between 1000.degree. and 1200.degree. C. to anneal out damage in the Si overlayer and to cause formation of the SiO.sub.2 layer from the implant, the thickness of the Si overlayer is increased by deposition of Si. Semiconductor devices can then be formed in the epitaxial silicon overlayer in a known manner.
The '009 patent also teaches that buried silicon carbide and silicon nitride layers can be formed in substantially the same manner, by implantation of, respectively, carbon or nitrogen ions. This prior art technique for forming a silicon heterostructure thus comprises implantation of relatively light ions into a silicon wafer, with the resulting buried silicon compound layer being non single crystal and nonepitaxial with the silicon matrix.
Recently some work has also been done that involves implantation of relatively heavy ions into silicon. See M. N. Kozicki et al, Institute of Physics Conference Series, No. 67, Section 3, pages 137-142 (1983). These authors report on the implantation of cobalt and chromium ions into polycrystalline silicon. The use of relatively high implantation energies (350 keV) resulted in the formation of a buried region of average composition of one metal atom to two silicon atoms. The implanted samples were subjected to a conventional furnace anneal (900.degree., 950.degree., or 1025.degree. C.) or to an electron beam anneal. The technique did not result in the formation of a homogeneous epitaxial buried layer. F. H. Sanchez et al, Proceedings of the Materials Research Society Symposium, Vol. 51, pages 439-444, (1986) discloses implantation of Cr, Fe, Co, and Ni ions into single crystal silicon samples. No buried layer was formed.
The prior art thus does not know any implantation method that results in formation of a buried single crystal layer that is epitaxial with the matrix. Furthermore, silicide layers formed by the prior art implantation process typically have a relatively low conductivity, due to the presence of grain boundaries, line and point defects, and possibly two or more phases. The relatively low conductivity and high defect density make such prior art buried silicide layers unacceptable for applications such as metal base transistors, and at least reduce their usefulness as a conductor material in multilayer integrated devices. On the other hand, the prior art deposition method can be used to produce epitaxial layers of silicide or other materials on silicon, and to form epitaxial silicon thereon, resulting in formation of buried layers of epitaxial silicide or other materials. However, these deposition processes are slow, can only be successfully practiced under extremely clean high vacuum conditions (thus typically do not lend themselves readily to practice in a manufacturing environment), tend to result in structures with interfacial impurities, and lead to incorporation of substantially all of the impurities in the starting material into the silicide.
In view of the potential significance of articles such as semiconductor devices comprising buried, high quality epitaxial single crystal layers of metal silicides and possibly other materials, a method for forming such buried layers that can be practiced in a manufacturing environment with commonly available apparatus that has the potential of high throughput, that inherently leads to substantially impurity-free interfaces and to the elimination of impurities that are present in at least one of the starting materials, is of substantial interest. This application discloses such a method.